Abstract
IoT refers to Internet of Things. It represents an evolution in which objects are ability to interacting with other objects and without requiring human-to-human or human-to-machine interaction. Each IoT device has the microcontroller. The microcontroller plays an important in the whole device. In this work, our architectures have the following feature: 1. RISC-like and with 16-bit and 32-bit instructions. 2. With 16 general purpose registers and each of them is 16-bit. All of the registers can separate to 8-bit and totally has 32 8-bit registers. 3. With two type of architectures, one is OTP-based and the other is SRAM-based. 4. OTP-based with 64 bytes data memory and 4096 bytes program memory. 5. SRAM-based with 1024 bytes data memory and 8192 words program memory. According to these features, especially the little program memory size, we pay attention to compiler for IoT microcontrollers with code size reduction in this work. To achieve this goal, we focus on several issue. First, we give an alternative way to register allocation without temporary register. Second, the divide operation need to be porting. Third, the shift operation need to be arrangement concisely. We use GNU Compiler Collection (GCC) for the environment of code generation. In our experiment, we show the code size of both OTP-based and SRAM-based microcontroller in different optimization options. We compare our targets' code size to Atmel AVR and shows the result has reduced in average.