Abstract
Code density is an important issue in embedded systems due to limited resources. It is a trend that embedded micro-controllers have both normal and short instruction set for code density, e.g. ARM/Thumb and MIPS32/MIPS16. Short instructions usually have some limitations compared to normal instructions, e.g. less register file accessibility or less immediate value range. In this work, we propose a compilation framework for code size reductions with 32-bit embedded micro-controllers. We also devise plans to further reduce code size for our target architecture by code-size-aware register re-number techniques. The target architecture has both 32/16-bit instructions set, and each of 16-bit instructions can map to subset of 32-bit instructions. The 16-bit instructions have 5/4/3-bit register index, and they might have immediate value constraint. Therefore, if we could allocate register properly, the 32-bit instructions could be transformed to 16-bit form for saving code size. With the flat register file, we can re-number the register without any performance loss. Our problem is to minimize code size for the given program using register re-numbering technique. In this paper, we prove the problem is NP-hard and give a heuristic algorithm to solve the problem. In picking up the register to replace the original register, we employ the small enough principle. This principle chooses register that can just fit into register index of 16-bit instruction making register usage more effective. The algorithm first builds def-use chain for the given program, and then find the register re-number solution making code size reduction by bounding the search space. The experiments ii is based on EEMBC benchmark suite [1] where the average reductions is 22.94% and highest is 26.75%.