Abstract
Turbo codes, proposed by Berrou, Glavieux, and Thitimajshima has been treated as an important development in coding theory. Turbo codes are used on the Dedicated Channel in the 3rd Generation Partnership Project (3GPP) proposal because of the excellent error correction performance. The key ingradients of turbo codes are the permutating device "interleaver" and the iterative decoding mechanism. In this thesis, we first survey various previously proposed soft-output decoding algorithms and then introduce a unified trace-back structure. Based on the unified structure, a two-backward-processor architecture is utilized and it can efficiently reduce the computational complexity. We implement the soft-output decoder according to the two-backward-processor strategy on a DSP chip, achieving decoding speed over 500 bps/iteration. Finally, the profiled result is shown and future design efforts are pointed out.