Abstract
A millimeter wave (mmWave) communication system provides multi-Gbps data rate in the short-distance transmission. Due to the small wavelengths of millimeter waves, the transceiver is able to use large antenna arrays to alleviate the serious signal attenuation. Furthermore, the link performance can be improved by adopting precoding technology in the multiple data stream transmission. However, the complexity of radio frequency chains (RF) grows even higher with large antenna arrays in the mmWave system. To reduce the hardware cost, the precoding circuit can be jointly designed in both the analog and digital domains and realized by simpler circuits. This thesis proposes a new method of building the joint RF and baseband precoder to reduce the computation complexity of the original precoder reconstruction algorithm and enable high parallelism hardware architecture. Moreover, the proposed precoder reconstruction algorithm is designed and implemented by using TSMC 90nm UTM CMOS technology. The proposed precoder reconstruction processor supports the transmissions of 1 to 4 data streams for 8x8 mmWave MIMO systems. The operating frequency of this chip is 167 MHz and power consumption is 243.2 mW when supply voltage is 1 V. The core area of post-layout result is about 3.94 mm$^2$. The proposed processor can achieve 4 M, 4.9 M, 6.7 M, 6.7 M channel-matrices per second in four-, three-, two-, and one-stream modes, respectively.