Design and implementation a 5Gbps transmitter with impedance mismatch and reflection cancellation in 0.18um CMOS technology

Thesis

Lin, Shih Hung

Masters, 國立清華大學, 電機工程學系

2015

Abstract

傳輸器

有線傳輸

反射消除

不匹配阻抗

Wireline communication

Reflection cancel

Transmitter

Impedance mismaching

因申請專利緣故，資料延後公開

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Title: Design and implementation a 5Gbps transmitter with impedance mismatch and reflection cancellation in 0.18um CMOS technology
Translated title: Design and implementation a 5Gbps transmitter with impedance mismatch and reflection cancellation in 0.18um CMOS technology
Creators: Lin, Shih Hung
Contributors: Hsieh, Ping Hsuan (Advisor)
Awarding Institution: 國立清華大學, 電機工程學系; Masters
Theses and Dissertations: Masters, 國立清華大學, 電機工程學系
Language: English
Resource Type: Thesis
Date published: 2016