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Design for Monitoring the Rise Times and Fall Times of Sampled Signals in Logic Circuits
Thesis

Design for Monitoring the Rise Times and Fall Times of Sampled Signals in Logic Circuits

Huang,Kuan Chen
Masters, 國立清華大學, 電機工程學系
2014

Abstract

老化電路監測 脈寬轉換 轉換時間 aging monitoring Pulse-Width conversion transition time
The aging of circuit will affect the transistor in Negative-Bias Temperature Instability (NBTI) and hot carrier injection and electron migration, which may cause the performance degradation and unexpected failure of the circuit. Therefore, detecting these defects is often necessary in modern testing. We propose a method to continuous detect the transition time on the target point. Our approach is to attach a monitor on the output of the logic gate. The rise and fall transition time is converted into a pulse width, and then further converted to the binary code. In the measurement of the access time, we use a time-to-digital converter. In addition, through an additional element to adjust the drive strength, to simulate the aging phenomenon, the monitor can detect the change in the transition time. We implement it in TSMC 90nm CMOS technology.

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