Abstract
With the rapidly increased demand of data rate for signal transmission, many researches put significant efforts on optical interconnects to solve the issues of speed limitation in conventional metal lines. In this thesis, we focus on designing ultra-high speed front-end circuits of optical communications to achieve a 40Gb/s modulator driver with 4V_PP output swing. The first chapter shows the challenges and background of modulator driver design. The second chapter lists the common broadband techniques and some detailed analysis. The third to fifth chapters show the simulation and measurement results of the circuits. The sixth chapter introduces two circuits with ITRI’s project. And a conclusion is given in chapter seven. In chapter 3, a low-Vt MOS is employed in a conventional topology of modulator driver in 40 nm CMOS. Due to the lower voltage requirement, those low-Vt MOS transistors can achieve the same gain but with smaller sizes, and further broaden the bandwidth. The chip area is 0.620.63 μm2 including two 3D solenoid inductors. In chapter 4, a new circuit topology is proposed based on cascade swing compensation to alleviate the bandwidth limitation from the conventional topology. The circuit is realized in 90 nm CMOS process. With the relatively large supply voltage of 3.4/6.5 V, the power consumption increased to 916 mW with a chip area of 0.870.97 m2. In chapter 5, a further modified broadband technique with cascade swing compensation topology is designed. Based on measurement results, a 4.5 V_PP output swing is achieved with a 767.2 mW power consumption, and the chip area is 0.870.97 〖μm〗^2. In chapter 6, two different types of modulator drivers were proposed due to the cooperation project with ITRI. The first circuit topology is distributed amplifier (DA) which is fabricated in 65 nm CMOS process. With the series of inductors between each stages all parasitic capacitances can be merged as a transmission line connections. That reduces input and output poles, then broaden bandwidth. The other circuit was fabricated with 130 nm SiGe HBT from IHP. By using the advantages of high f_T and high breakdown voltage characteristics of the device, the circuit can obtain a much better performance with high speed and high output swing. But a series of buffer stages are necessary to prevent the leakage current from base node during large signal transmission. And the final conclusion and specification comparison table with the presented papers are introduced in chapter 7.