Abstract
In this thesis, an ultra-low-power miniature 20Gb/s passive/active hybrid equalizer and a novel 20Gb/s adaptive bias equalizer are proposed. In the first work, a compact and low-power passive/active hybrid equalizer is presented. By sharing the loading of high frequency peaking with the active equalizing stage, the passive filtering stage reduces the power significantly. To achieve a small area, the 3D inductor and active inductor techniques have also been incorporated in this design. Implemented in a standard 90 nm CMOS process, this passive/active hybrid equalizer has a very small power consumption of 10.8 mW and occupies a core chip area of only 0.017mm2. It can successfully equalize for the data transmitted through 180-cm coaxial cable line up to 22Gb/s in the measurement, where the peak-to-peak jitter is about 19 ps. In the second work, a novel adaptive bias equalizer is proposed. By adopting adaptive bias control circuit, the equalization is able to fulfill adaptive compensation without using a complex feedback loop. The proposed scheme also eliminates the conflict problem in traditional dual loop control, the speed limitation of comparator, and all the additional circuits in the servo loop. The proposed adaptive bias equalizer is able to transmit 22Gb/s data for a cable loss of 7dB, 9dB, and 11dB at 11GHz, where the peak-to-peak jitter is about 9ps, 11ps and 23ps, respectively.