Abstract
Convolutional encoder and Viterbi decoder are widely used in modern digital wireless communication system to achieve low bit-error-rate data transmission. Rapid developments in wireless communication have created a rising demand for high-speed, low-power, and low cost Viterbi decoder for large constraint length convolutional codes. In this thesis, we investigate the minimum transition traceback scheme and propose a scheme for the implementation of a low-power Viterbi decoder. We combine the minimum transition traceback scheme with the high-radix ACS (Add-Compare-Select) functional unit, the count of memory accesses needed to perform the traceback function can sufficiently be reduced. Therefore, the power consumption can also be reduced. Experimental results are presented to confirm the efficiency of the proposed scheme. In experiments, the Viterbi decoder for the IEEE 802.16a WMAN receiver was used.