Abstract
ABSTRACT Although the dopant segregation (DS) technique can efficiently modify a Schottky barrier to improve SBMOS, the performance of scaled DS-SBMOS suffers from degraded short-channel behavior and ambipolar conduction from the extension of a heavily doped segregation layer. As in traditional MOSFETs, lateral halo profile must be used together with minimization of vertical dimensions to control efficiency the short-channel behaviors of DS-SBMOS. Unfortunately, the ambipolar hole current and the band-to-band tunneling leakage are significantly aggravated due to the parasitic N+ extension/P+ halo junction. In addition, it can be found that the degradation in subthreshold current is observed for the use of silicon-on-insulator (SOI) structure. The potential of channel region decreases due to the stronger gate control, and the potential weakness results in significant subsurface thermal emission electron current that limits the switching characteristics of SOI DS-SBMOS. An Insulated Dielectric Oxide (IDO) structure is presented for the DS-SBMOS devices to suppress the unwanted on- and off-state leakage currents in short-channel DS-SBMOS. The effects of the IDO on DS-SBMOS are investigated using two-dimensional device simulations. With sidewall IDO insulators between the heavily doped N+ segregation layer and P+ halo region, the lateral electrical field can be significantly lowered leads to band-to-band leakage currents are minimized. It also relieves the narrowing of the hole Schottky barrier in the drain region to yield a neglected ambipolar hole current. Thus, an optimal halo can be utilized to control the short-channel effect without any constraints in problematic leakage currents. Besides, the IDO structure also eliminates the potential weakness because the channel potential is not coupling via the buried oxide layer. The design of IDO DS-SBMOS combines both the merits of dopant segregation technique and ideal halo profile to serve as an attractive candidate for next-generation CMOS devices.