Abstract
Testing for FPGA performance problems has become an important task for ever-increasingly advanced technology. To develop testing methodologies, an effective evaluation tool should play an important role in this process. In this thesis, we present an FPGA fault simulation tool (FFAST). This tool can report coverages of randomly distributed multiple defects causing delay faults in FPGAs. FFAST can also identify paths (test configurations) which are not covered in the current tests. This information can be used to further improve the quality of test configuration sets.