Abstract
As the CMOS technology coming to nano meter scale, process variation play an important role in yield of production. In order to identify variability issues for low yield process, process monitoring circuitry, such as ring oscillators, delay chain, or delay-test-based diagnosis methods are applied to measure excessive delays in a circuit. Based on the observed delay data, we propose to further classify and find the main features (most possible causes, e.g., gate types) that would explain the severity of a particular process region. Then fed back information to designers and process engineers. That can help them rapidly tune design or adjust process parameter to overcome the issue caused by process variation and promote the yield of production. In our method, support vector regression is employed to build models and partition the circuit into different process regions. That can distinguish different process variation influence and its affected regions. Then feature extraction algorithm in machine learning field is applied to rank features. The feature with higher rank, means it have more probability to cause process variation. Experimental results show that the proposed method can effectively identify process regions and rank injected variations.