Abstract
A novel Gate-All-Around (GAA) Ultra-Thin Body (UTB) P-channel poly-Si TFT functioning as transistor and flash memory with Silicon-Nanocrystals (NCs) have been successfully demonstrated. The proposed fabrication to form UTB is simple and without extra masks. Applying Gate-All-Around structure of the nanowires and Ultra-Thin Body structure enhance gate control ability, and suppress short-channel effects, including lowering the leakage. Three structures are compared, Edge Ω-gate planar with edge ultra thin 3nm-thickness body, GAA NW with ultra thin 5nm-thickness body, and Tri-gate NW with 25nm-thickness body. For the edge 3-nm-thick channel devices (the Edge Ω-gate planar), the S.S. can reach 88 mV/decade and Ion/Ioff ratio can achieve more than 108. To memory, using Gate-All-Around structure enhances the tunneling oxide electric field, and suppresses the gate injection. But with enhancing the tunneling oxide electric field, the reliability becomes worse. In order to improve reliability, silicon-Nanocrystals charge trapping layer is applied. Due to the difference of conduction band between Silicon-Nanocrystals and silicon oxide would be enlarged, so it has improved the data retention. The thesis is operating in p-channel Flash memory. The operations, including Fowler-Nordheim (FN) Tunneling and Band-To-Band Tunneling Induced Hot Electron Injection (BTBTIHE) are compared. And it shows extreme low applied voltage for band-to-band-tunneling-induced hot electron injection tunneling (BBHE) operation and excellent retention are proposed. The UTB devices are with steeper S.S., higher Ion/Ioff ratio, smaller DIBL and larger driving current than planar TFTs. The GAA and Edge Ω-gate planar structure with Si NCs NVM performs great P/E speed and good reliability. The process of the ultra-thin channel is simple with mask free and highly compatible with the current flash process, which is highly promised for the future 3D stacked high-density applications.