Abstract
Owing to the significance of silicon nanowires, many fields including semiconductor, optoelectronic, bio-sensor, and energy resource, the development of fabricating them is in progress, for example, vapor-liquid-solid (VLS) growth 1, solid-liquid-solid (SLS) growth 2, solution-grown process 3, oxide assisted growth (OAG) 4, template-assisted growth, catalytic chemical vapor deposition (CVD) 5, and others 6. In fact, a crucial key of realizing the practical applications based on SiNWs is the geometric control of fabricated SiNWs - including their lengths, orientations, and sizes. Unfortunately most of methods aforementioned result in randomly oriented SiNWs and exceptionally a catalytic chemical CVD process promise a large-scale aligned SiNWs array. Yet, the diameters of the SiNWs fabricated by this method widely range from 50-250 nm mainly determined by the size of gold (Au) catalysts. More critically, SiNWs fabricated by the catalytic processes inevitably contain saturated dopants and the process temperature is usually above 9000C, impeding their implementation in IC industry (in particularly, the most popular catalyst is gold, an extremely lethal impurity for ICs). As a result, here we employ a electroless metal deposition (EMD) method 7, allowing simple and convenient approach to generate SiNWs of single-crystalline, well-aligned and large area. After synthesizing the SiNWs, the next step focuses on controlling the geometry (growth direction, length, and width). In our research, we successfully fabricate different growth directions of SiNWs. When using (100) wafer, growth direction is <100> and SiNWs are vertical to the substrate. When using (110) wafer, growth direction is <100> and SiNWs are inclined to the substrate. When using (111) wafer, two growth directions are observed, <111>and <100>; one kind of SiNWs are generated vertically to the substrate, anther kinds are slant to the substrate and form pyramid shapes. Therefore, the preferential crystallographic orientation of fabricating SiNWs is <100> direction. In our experiment, the length of SiNWs which are grown on the (100) wafer shows a linear relationship with the etching time. The growth rate is about 1.08 μm / min. To compare with VLS method, it is really fast. The diameter control of SiNWs is achieved by employing Taguchi method, a powerful tool that uses less experiment times to get the optimal parameters, leading to the capability of controlling the diameter with narrow distribution and comprehension of the influences from all process parameters. Afterwards, we use SiNWs which are grown on different oriented wafer to do the field emission detection and Raman spectroscopy analysis. The SiNWs (generated from (100) wafer) shows the best field emission property with turn-on field of 1.5 V / μm and 0.1 μA. On the other hand, SiNWs (generated from (111) wafer) shows the greatest Raman intensity. Finally, we make the top parts of SiNWs (generated from (100) wafer) successfully displaced to CuNWs directly. It is feasible to apply as interconnection, plasmonic photon, and bio-sensor.