Abstract
H.264/AVC is the latest video compression standard. It achieves a significant improvement in bit-rate saving and rate-distortion performance compared with all existing compression standards. It particularly concentrates on video compression and fully supports robust transmission over networks. At the same video quality, it could achieve about 60% bit-rate saving over MPEG-2, and about 40% bit-rate saving over MPEG-4. High compression efficiency of H.264 gradually attracts many industries to apply it for emerging applications such as High Definition DVD, Digital TV, Digital Camcorders, Camera Phone, Internet video streaming, and others. However, H.264’s complicated encoding process can not guarantee feasibility in real-time coding implementation; in addition, huge computation will cause huge power-consumption. Therefore, from a conservative view, it will face a big challenge for becoming unpopular even it has superior performance.The objective of this thesis is to optimize the architectures of H.264AVC CAVLC.We review Encoding/Decoding process and revise Look Up tables for saving memory and speeding up Encoding/Decoding process. Flexible architecture is designed such that the use of H.264 in different applications can be adjusted by easy-recombining, and it will also possess real-time coding capability. We can get a conclusion in our architecture design. In the Encoder, each 4x4 residual block can save 2~27 clk cycles. First, we use 16 comparators to find first nonzero coefficient that can save 0~15 clk cycles. Second, we used zero tree to separate the coefficient token table, which can save 2~12 clk cycles each 4x4 residual block. Third, we revise VLC tables for saving memory and intend to revise the Coeff_token table to speed up encoding process. We used zero tree to separate the table to let higher frequent codeword put in table1 and lower frequent codewords put in the other tables. The revised VLC tables and zero tree can be seen in Chapter 2. We need only store the min positive parts of the VLC tables and need only store VLC tables, instead of the original seven tables. In the Decoder, each 4x4 residual block can save 2~12 clk cycles. Because we used zero tree to separate the coefficient token table, which can save 2~12 clk cycles for each 4x4 residual block.Xilinx FPGA platform simulation demonstrates the real-time capability of proposed H.264/AVC Encoding/Decoding architecture. From architecture simulation, we observe that videos pass through the CAVLC Encoding and Decoding in real time and ensure that displays stable decoded frames.