Abstract
In this thesis, baseband speci‾cation design, functional simulation, architecture def- inition, and logic design along with FPGA implementation of the baseband transceiver for HOY wireless test platform are presented. A suitable physical layer speci‾cation is designed for wireless test. There is a hand- shaking scheme for locking the carrier frequency of radio frequency (RF) module. Addi- tionally, the signal protocol to exchange information with media access control (MAC) module is also presented. The proposed baseband transceiver includes several functional parts, interface mod- ule, transmitter, packet detection, boundary detection, sampling frequency o®set (SFO) compensator, despreader, and Viterbi decoder. The functional parts choose suitable existing algorithms to implement for the functionalities of them. The implementation is also in automated test equipment (ATE) and device under test (DUT). Additive white Gaussian noise (AWGN) channel is used to estimate the baseband performance. Then the proposed baseband transceiver is veri‾ed by FPGA and inte- grated into the test platform. Finally, an integrated demo chip has been tap-out with the baseband inside. The chip will be measured in this summer.