High Speed Read Circuit and I/O Design for 3D Stacked RRAM

Thesis

Chen, Yi-Wei

Masters, 國立清華大學, 電子工程研究所

2013

Abstract

三維晶片

直通矽晶穿孔

電阻式記憶體

3D IC

TSV

RRAM

因申請專利緣故，資料延後公開

1 Record Views

Title: High Speed Read Circuit and I/O Design for 3D Stacked RRAM
Translated title: High Speed Read Circuit and I/O Design for 3D Stacked RRAM
Creators: Chen, Yi-Wei
Contributors: Chang, Meng-Fan (Advisor)
Awarding Institution: 國立清華大學, 電子工程研究所; Masters
Theses and Dissertations: Masters, 國立清華大學, 電子工程研究所
Language: English
Resource Type: Thesis
Date published: 2013