Abstract
Constructing an ATM switching system is one of the main challenges of ATM network system design. For an ATM switching system, it is important to provide large bandwidth, low cell loss probability, and small delay time. In this thesis, a 32×32 ATM switching fabric is implemented, based on the design of the Knockout-Banyan Switch, into 8 identical chips. This design has been proved that its hardware complexity is O(NlogN), its cell loss probability is the same as the Knockout Swith, and its time complexity of delay is similar to the Banyan Network, which is O(logN). By using the pipeline and bit cut-through scheme, the set-routing delay of this ATM switching system is only 17 bit-time cycles, and the data-switching delay is only 4 bit-time cycles. Also, 2 basic chip modules have been developed in this thesis such that it is easy to scale the size of the switching system up without being fundamentally limited by the hardware technology. Thus, it is possible to provide high bandwidth, low cell loss probability and small delay time for our implementation.