Abstract
Dynamic power greatly increases in nanometer technologies because of increasing functional requirements as well as continuing emphasis on rising clock frequencies. The technique of supply dual voltages is one of the most effective ways to hold down the rise of dynamic power in nanometer design. In this paper, we present a standard cell placement algorithm with supporting dual supply voltages to reduce total power dissipation. Our approach also minimizes the power grid overhead by adopting voltage islands. We start at dual voltage assignment as our input. First, the cells with different supply voltages are separated into several clusters by hMETIS [6]. Second, in order to minimizing the total power consumption and power grid complexity, the clusters are first placed into a grid by using simulated annealing. Third, we introduce an analytical placement approach as a convex quadratic program formulation of the power minimization problem. However, the approach may cause overlap among cells, so we adopted the Cell Shifting and readjust cell methods [9] to reduce the overlap.