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Low power FLASH memory read word-line voltage generator
Thesis

Low power FLASH memory read word-line voltage generator

Chih-Chia Yang
Masters, 國立清華大學, 電子工程研究所
2005

Abstract

快閃記憶體 電壓產生器 低功率 字線 FLASH memory voltage generator low power word-line
As supply voltage becomes lower and lower, the read word-line voltage generator becomes more and more important. In this thesis, the word-line voltage generator for FLASH memory read operation is studied. First, the requirement of read word-line voltage is studied. It appears that the read word-line voltage could not be too low for cell current concern. Thus, the supply voltage is no longer suitable as device scales down. However, the word-line voltage could not be too high either, for cell current ratio concern. Moreover, the relation of cell current and temperature is also studied. For cell current consideration, the word-line voltage should be higher at high temperature. Two kinds of read word-line voltage generator are then compared. The kick method is superior for its low stand-by power. The pool method, on the contrary, has better speed and accuracy. To obtain fast access time, the pool method is further implemented. The high stand-by power of pool method is solved by biasing the devices in weak inversion. The simulation result shows that the utilization of weak inversed devices indeed suppresses stand-by power. However, area now becomes the main cost of this method.

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