Abstract
Large current in a VLSI chip can cause reliability problems such as noises and power consumption. In this thesis, we attempt to analyze the lower bound on the Maximum Instantaneous Current (MIC) of a circuit. The MIC of a circuit mainly consists of switching and leakage current. The objective of this thesis is to find a pair of “worst-case” input vectors, which can activate as many switchings as possible. To activate many switchings, we formulate a gate’s rising conditions at a time instant as a Boolean function called the Transition-Aware Function (TAF). By constructing the TAFs of a time instant for a set of gates, we can use ATPG or SAT solver to determine whether the set of gates can switch at the time instant, and in addition, we can also derive a pair of input vectors to activate the set of gates. Our algorithm starts with solutions from upper-bound estimation tools in [2]. Then, recursively builds the TAFs for the set of gates reported to have large MIC from an upper bound tool. Our experimental results show that the new technique using the TAF can be 30% more accurate than the genetic algorithm in [4] for ISCAS combinational benchmarks. In addition, due to the nature of our algorithm, it also can consider signal correlations across sequential elements (flip-flops), whereas previous research on this topic addressed on combinational circuits only. Our results on ISCAS sequential benchmarks show 58% improvement than those from random simulation.