Memory-Efficient VLSI Architecture of Cost Volume Generation for High-Range Light-Field Stereo Matching

Thesis

Lu, Yu-Ta

Masters, 國立清華大學, 電機工程學系所

2016

Abstract

光場

匹配成本

立體匹配

大型積體電路

深度估測

light field

matching cost

stereo matching

VLSI

depth estimation

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Title: Memory-Efficient VLSI Architecture of Cost Volume Generation for High-Range Light-Field Stereo Matching
Translated title: Memory-Efficient VLSI Architecture of Cost Volume Generation for High-Range Light-Field Stereo Matching
Creators: Lu, Yu-Ta
Contributors: Huang, Chao-Tsung (Advisor)
Awarding Institution: 國立清華大學, 電機工程學系所; Masters
Theses and Dissertations: Masters, 國立清華大學, 電機工程學系所
Language: English
Resource Type: Thesis
Date published: 2017