Abstract
Over the last few years, heterogeneous architecture that integrates CPU and GPU together has become popular. It provides good computational performance, flexibility, and power efficiency. An ideal heterogeneous architecture should be able to execute CPU devices and GPU devices at the same time and allocate the computations freely between CPU and GPU. Unfortunately, existing simulators for heterogeneous architecture can only run either CPU host program with GPU kernels or CPU kernels, but not both. This hinders the research on heterogeneous architecture designs. To overcome this limitation, we propose in this thesis an interim solution that mixes CPU and GPU kernel traces to facilitate heterogeneous architecture research that uses trace-driven simulations, such as Network-on-Chip (NoC). To evaluate the feasibility of the proposed method, we compare the performance data reported by a NoC simulator, Garnet, using the mixed traces with those using a reference trace, both are taken from the heterogeneous architecture simulator, Multi2Sim. Our experimental results show that mixing traces can generate an average network latency very similar to the reference trace, with an average error of 1.21%.