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Multi-Stage Architecture for Quasi-Circuit Switch
Thesis

Multi-Stage Architecture for Quasi-Circuit Switch

Che-Wei Lo
Masters, 國立清華大學, 通訊工程研究所
2004

Abstract

類似電路交換機 布可荷夫-范紐曼交換機 多層架構交換機 傳輸速率保證 封包延遲控制
In this thesis, we propose the multi-stage architecture for quasi-circuit switching to discuss. In the previous work, we have assumed that all input flows are (r, T)-smooth. Furthermore, it is assumed that the all inputs of an switch satisfy the no overbooking condition. Load balanced Birkoff-von Neumann quasi-circuit switch is one of quasi-circuit switches. It can provide guaranteed rate services and all the packets would be transmitted their destinations without lost. Although this quasi-circuit switch can offer quality of services, the maximum delay becomes larger and the hardware complexity increases as the size of switch fabric is large. Therefore, we propose a multi-stage architecture for quasi-circuit switch, called Banyan-based scheme. It is composed of some quasi-circuit switches. Each of crossbar fabrics has one-cycle permutation matrix and changes its matrix every frame time. We will prove that the Banyan-based scheme has less maximum delay than former scheme as the size of switch fabric is larger than . To compare with Benes quasi-circuit switches; the Banyan-based scheme has less maximum and average delay as the frame size is less than some values.

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