Abstract
Abstract In this study, a novel logic OTP cell using offset define silicide structure was demonstrated. The silicon data has proven that this cell can be adapted in 0.18 μm technology node. The ODS fuse is compatible with logic CMOS process without additional change in masks. Electromigration/ rupture is used as the program mechanism for the ODS fuses. The unique design feature in this cell is to utilize RPO to define narrow silicide portion and realize low program current target. This cell can achieve 4.4mA program current which is 20% reduction from the reference symmetrical fuse. However, program voltage of 5V is too high for advance circuits. To compensate this issue, two alternative structures are proposed. These two solutions retain the idea of offset define while successfully suppressing the program voltage. They have not been silicon verified, but simulation shows the program voltage can be effectively reduced to meet the need for fuses embedded in advanced logic circuits.