Abstract
Chalcogenide phase change memory devices use the alloy system, which is non-volatile and the access speed of the chalcogenide device can be as fast as DRAM. Meanwhile, chalcogenide phase change memory also possesses advantages on scalability, low power and high endurance to cycling. A chalcogenide phase change memory is operated by using its high resistance ratio between amorphous phase (reset state) and crystalline phase (set state). Typically the resistance ratio is over 1000 times between the two states. In this article the simulations for the thermal behavior and the electrical properties of the Phase-Change Memory in reset and set states have been conducted using the energy equation and the charge conservation law. However, simulations on the issue related the change of phases on the conductive resistance are not reported. Therefore, the present work will focus on using the charge conservation law and the energy equation to analyze the resistance variations between the crystalline and amorphous states of the layer based phase-change device, PCRAM (Phase-change Random Access Memory), which is the future-generation non-volatile memory. Issues addressed in the present study also include, 1.the effects of the thickness of the layer on the cooling rate 2.the influences of the cross-section area of the BEC layer on the heating time 3.the effects of the ratio of the current-limiting resistance over the resistance of PCRAM on the set operation.