Abstract
我們提出固定可測的跳躍進位及前瞻進位加法器．這些加法器均被限定 為4k位元，也就是說，這些加法器是由 k組4位元的方塊所構成．而一組 的測試向量可以由畢卡索來產生，他是一種循序的ATPG．依據一組的測試 向量，我們可以擴展他成為k組的測試向量，並且這些擴展的測試向量的 數目是不變得．因此，對於一個跳躍進位加法器需要17個測試向量，而對 於一個前瞻進位加法器需要28個測試向量．再者，ALU的電路設計以及測 試．有四種加法器應用到ALU上：(1)漣波進位加法器，(2)曼徹司特進位 鏈，(3)跳躍進位加法器，(4)前瞻進位加法器．具漣波有加法器的ALU， 如果是在單一單元缺陷模式下，它需要48個測試向量．具有曼徹司特進位 鏈的ALU，如果是在單一觸點缺陷模式下，它需要7個測試向量，如果曼徹 司特進位鏈觸開或觸閉的缺陷模式，它需要61個測試向量．如果具有跳躍 進位加法器和前瞻進位加法器的ALU，它們分別需要16及23個測試向量． 我們也使用了與跳躍進位加法器和前瞻進位加法器的方法來成具有k組4位 元算術單元的測試向量．最後，我們提出了一個同時錯誤檢查器的運算單 元，我們是利用一種低成本餘數碼去設計一個TSC檢查器．我們利用畢卡 索做模擬，並且利用數學來證明具有漣波進位，跳躍進位及前瞻進位加法 器的算術單元是TSC檢查器．這些檢查器硬體多餘的部份與伯格碼比較， 得知Mod-7檢查器需要較少的硬體電路． We present C-testable carry-skip and carry- lookahead adders. The size of the adders is 4k bits, where k is an arbitrary positive integer. Test patterns of a 4-bit group can be generated by analysis or an ATPG. These test patterns can be expanded to test a 4k-bit adder containing more than one group. The number of expanded test patterns are shown to be independent of the size of these adders. The number of test patterns is 17 for the carry-skip adder and 28 for the carry- lookahead adder. We also discuss ALU circuit design and testing. The ALU designs are based on four types of adder: (1) the ripple carry adder, (2) the Manchester carry chain, (3) the carry-skip adder, and (4) the carry-lookahead adder. The ALU based on ripple carry adder needs 48 test patterns under the single cell fault model. The ALU with Manchester carry chain is similar to a ripple carry adder. It needs 7 test patterns to test single stuck-at faults. If we consider the stuck- open or stuck-on fault in the Manchester carry chain, it needs 61 test patterns. If the ALU is based on the carry-skip or the carry- lookahead adder, it needs 16 or 23 test patterns, respectively. C-testability of these ALUs is verified by fault simulation. We also present a concurrent error detection (CED) arithmetic unit for the above ALUs. We use a low cost residue code with the modulus of 7 to design a TSC checker. Also, we show that the arithmetic unit with the ripple carry, the carry-skip, and the carry- lookahead adders are all TSC by mathematic analysis and fault simulation. The hardware redundancy of the mod-7 checker are compared with Berger check prediction (BCP) checker, and is shown to be less than BCP checker.