Abstract
Abstract As interconnect feature size decreases and clock frequency increases, the on-chip resistance-capacitance (RC) time delays become the major limitation in achieving high circuit speeds. High electromigration resistance is required due to the high current density in devices. Cu is used now for an advanced interconnection metallization due to its high risistance to electromigration and low resistivity. Electroplating copper is the most promising copper deposition technology in sub-quarter micron ULSI devices. Plating is especially appealing because of the low cost, high throughput, high quality of deposited copper film and excellent via/trench filling capability. 40-nm-thick TaN was deposited on silicon wafer. Cu seed layers were then deposited onto TaN/Si by long throw sputtering (LTS) or ionized metal plasma (IMP) method. For electroplating Cu, the electrolyte was composed of CuSO4.5H2O and H2SO4. The deposition was done with an applied voltage of 18 V. The anode was a piece of commercial Cu source and the cathode was Cu(seedlayer)/TaN/Si substrate. The thickness of copper films was measured by a transmission electron microscope. The resistivity was measured using a four point probe. Growth orientation of Cu films was determined by XRD. XRD data showed that stronger Cu (111) texture was observed in the seed layer deposited by LTS. Only Cu (111) peak appeared in the electroplated Cu films grown on the Cu(seedlayer)/TaN substrate deposited by LTS. On the other hand, both IMP deposited seed layer and overlying electroplated Cu film exhibit also (200) XRD peak. The results indicate that the growth orientation of electroplated Cu films was affected by the seed layer and barrier layer. Resistivity of electroplated film decreases with the thickness of electroplated copper films owing to the reduction in defect density. 5-nm-thick TaN can prevent interactions between Cu and Si at temperatures up to 500 oC with an annealing time of 30 min.