Abstract
Memory is now widely used in digital systems. The popular core-based System-on-Chip (SoC) environment always contains some kind and different size of memory cores. The testing for these embedded memory becomes more important and essential. In this thesis, we will present a processor-programmable memory built-in self-test (BIST) framework for SoC environment. We promise to build up a friendly and complete test framework to perform memory testing and verify our idea. In our SoC test environment, it includes one microprocessor, the programmable BIST circuit we proposed, self-defined bus, arbiter, I/O, and memory. The test framework can automatically execute most popular March test algorithms through brief description of March algorithm and register definition for our BIST circuit. It simulates March algorithm in a simple SoC environment after programming BIST circuit via on-chip microprocessor. Finally, it will show the test results and if any error occurs when testing, it can report the erroneous responses and faulty addresses, too. Compared with processor-based memory BIST schemes that use an assembly-language program to perform testing and comparison of the memory outputs, the test time of our proposed BIST circuit is greatly reduced. Compared with conventional dedicated BIST circuit, the area overhead can be reduced and flexibility is higher. The proposed framework can perform various March test algorithms and verify the functionality of our BIST circuit.