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Sub-1 GHz Indutor-Less Wideband Low Noise Amplifier Design and Implementation
Thesis

Sub-1 GHz Indutor-Less Wideband Low Noise Amplifier Design and Implementation

Chen, Jian-Shou
Masters, 國立清華大學, 工程與系統科學系
2012

Abstract

寬頻低雜訊放大器 無電感放大器 wideband LNA Inductor-less LNA
This thesis consists of five chapters, introducing three topologies of inductor-less wideband low noise amplifier (LNA). Chapter 2 introduces a single to differential wideband LNA. The proposed LNA is composed of three inverter-based gain stages with a global shunt feedback resistor which benefits wideband input impedance matching. Moreover, employing resistor and capacitor (RC) shunt peaking at the third gain stage enhances pseudo-differential output gain and phase balances and linearity. Implemented in TSMC 0.18 μm CMOS process, the proposed LNA covering DC-1.4 GHz achieves a S21 of 16.4 dB, a S11<-10 dB, IIP3 -8.8 dBm and a minimum noise figure (with output buffer) of 3 dB. The output gain imbalance is less than 1.5 dB and the output phase imbalance is less than 4.5°. The power consumption is 12.8 mW at 1.8 V. In chapter 3, a transconductance enhancement capacitive cross-coupled (CCC) common-gate LNA is discussed. Adding CCC current source reduces NF, and cascode CCC structure rectifies the gain/phase imbalance due to the input balun. In chapter 4, based on the discussion in chapter 3, the proposed LNA implemented in TSMC 90 nm CMOS process achieves a S21 of 11.5 dB, a S11<-8.6 dB, minimum noise figure (with buffer) 2.14dB and IIP3 -0.86 dBm from 0.01 to 1.01 GHz. The power consumption is 5.44 mW at 2 V.

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