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Synthesis of Approximate Threshold Logic Circuits with an Error Rate Guarantee
Thesis

Synthesis of Approximate Threshold Logic Circuits with an Error Rate Guarantee

Lai, Yung-An
Masters, 國立清華大學, 資訊工程學系所
2016

Abstract

臨界值邏輯 近似運算 近似邏輯合成 Threshold Logic Approximate computing Approximate logic synthesis
Recently, threshold logic attracts a lot of attention due to the advances of its physical implementation and the strong binding to neural networks.On the other hand, approximate computing is a new design paradigm that focuses on error-tolerant applications, e.g., machine learning or pattern recognition.In this thesis, we integrate threshold logic with approximate computing and propose a synthesis algorithm to obtain cost-efficient approximate threshold logic circuits with an error rate guarantee.We conduct experiments on a set of IWLS 2005 benchmarks.The experimental results show that the proposed algorithm can efficiently explore the approximability of each benchmark.For a 5\% error rate constraint, the circuit cost can be reduced by 22.8\% on average.

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