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The Design and Implementation of Gigabit IPv4/IPv6 Translator Based on Network Processor on Chassis-Based Platform
Thesis

The Design and Implementation of Gigabit IPv4/IPv6 Translator Based on Network Processor on Chassis-Based Platform

Shr-Hung Wang
Masters, 國立清華大學, 資訊工程學系
2003

Abstract

轉換器 超高速 IPv6 Translator Gigabit
We describe a gigabit IPv4-IPv6 Translator on a chassis-based platform containing a pair of Vitesse IQ2000 network processor module. It provides an order of magnitude improvement in packet throughput over an implementation of the same functionality on general purpose PC. The next generation Internet Protocol, IPv6, became an Internet Engineering Task Force (IETF) standard in late 1995, motivated by concern that the IPv4 address space would soon be exhausted. The use of classless interdomain routing (CIDR), efficient allocation of address blocks and the use of network address translation (NAT) at the edges has postponed the day expected. However, the depletion of IPv4 address space is inevitable. It is generally agreed that it may take a long time to migrate from IPv4 to IPv6, and that three transition mechanisms, dual stack, tunneling, and address translation will be used. In this thesis, we design an IPv4/IPv6 NAT-PT translator for Network Processor-Based architecture, and implement the system on Chassis-Based Platform. The Network processor has so many advantages like programmability, flexibility, hardware speedup, high speed, and multi-level processing that it can maximize bandwidth utilization and network traffic flow. Moreover, we embedded the Network Processor-Based system, as a module, to the Chassis-Based Platform that is scalable for integrating the other service into the multi-service platform. We expect that our achievement can be used as a prototype of next generation core-network equipment.

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