Abstract
The recent development of wireless communication systems such as cellular phones have increased the emphasis on low cost, high performance, low consumption, and simplicity. But the traditional wireless systems are built from mixture of IC technologies: GaAs or Silicon bipolar for RF front-end, CMOS for the baseband. This approach increases system complexity, cost, and power consumption. The recent advent of CMOS technology and the continued improvement in CMOS device speed have prompted much to the possibility of building analogy sections with radio frequency circuits and baseband digital circuits in the same IC. The techniques offer a feasible and attractive solution to the approaches. This thesis presents the study of CMOS RF front-end circuits composing of low noise amplifier, downconversion mixer and RF oscillator for wireless applications. In the design of low-noise amplifier, this circuit consists of all-nMOSFET gain stage with cascode connection. The gain is about 29dB, the input 1dB compression point is -20dBm, and the noise figure is about 2.1dB. Furthermore, the downconversion mixer is implemented by using the Gilbert Cell. The designed mixer has conversion gain of 6dB, the input 1dB compression point is 0dBm, and the input-referred third-order intercept point (IIP3) is about 9dBm. Finally, the RF oscillator belongs to a LC-oscillator topology. When the frequency of oscillation is at 2.6GHz, the phase noise is about -106dBc/Hz at 100kHz from the carrier. These RF building blocks are fabricated with the standard TSMC 0.35um CMOS technology. The test chip then is measured, and it demonstrates that these RF building blocks illustrate an attractive all-CMOS approach. All of the design, simulation, and experiment are presented in this thesis.