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Timing aware testing and repair for interposer wires in 2.5-D IC
Thesis

Timing aware testing and repair for interposer wires in 2.5-D IC

Lee, Jeo-Yen
Masters, 國立清華大學, 電機工程學系
2012

Abstract

晶片間連接線測試 2.5維IC堆疊 中介層 延遲錯誤 橋接錯誤 符合速度測試 脈衝消失測試 Die-to-die Interconnect Test 2.5-D Stacked IC Interposer Delay Fault Bridging Fault At-Speed Test Pulse-Vanishing Test
We present a general at-speed test method for die-to-die interconnects and demonstrate its particular application for the interposer wires in a 2.5-D IC. At the heart of this method is a Pulse-Vanishing test technique (called PV-test), in which a short-duration pulse signal is applied to an interposer wire under test at the driver end. If this pulse vanishes at the receiver’s output, then it indicates the presence of a delay fault. This PV-test technique is effective for detecting not only resistive open faults, but also resistive bridging faults between interposer wires. This method has several other advantages. For example, the implementation is especially easy as it incorporates only logic cells and can be merged with boundary scan cells. Besides, because it can support on-the-spot diagnosis, we already have implemented Built-In Self-Repair to make the whole thesis more solid.

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