Abstract
With the rapid development of information technology, the bandwidth requirement for data transmission becomes a major concern. The operating frequency of circuits is pushed towards microwave frequency range to pursue a higher data rate and more available spectrums. However, there are also more challenges and difficulties for IC designers at high frequencies. In this thesis, two voltage-controlled oscillators operating at V-bands are proposed. The fundamental analysis of different LC combinations is discussed first. In the first design, an variable inductor implemented by the parasitic inductor of a varactor is used to solve the problem of poor quality factor the varactor at high frequencies. When the operating frequency becomes higher than the self-resonance frequency of the varactor, the reactance will transfer the capacitance to inductance, and the loss to the tank will become smaller. The simulated results show that the VCO is capable of operating at 61GHz with a phase noise of -98.8 dBc/Hz, under a power consumption of 50mW. In the second design, a resonant output buffer configuration is proposed to prevent the degradation of VCO core circuits under 50 ohm condition at high frequencies. Under VDD of 1.2V with DC current about 11.2mA, measurement results demonstrate that the VCO has an center frequency at ? GHz, phase noise at 1MHz offset of -91.3 dBc/Hz, a tuning range of 1.3GHz, and the efficiency of DC to RF power is 2.8% with an FOM=-174.9. Following the VCO design, two high speed OOK transmitters for wireline communications are proposed. One critical problem of using conventional ASK (OOK) modulation in these transmitters is serious attenuation at high frequencies. If increasing the transistor size to enhance the power, the obvious tradeoffs are a lowered switching speed and degraded on/off isolation. In this thesis, we propose two different OOK-based transmitters operating at the carrier frequencies of 20 and 60 GHz, respectively. The 20-GHz OOK transmitter consists of three parts including the trigger, modulator, and the output buffer. With the proposed topology, the isolation between the on and off states is improved, and the speed of data transmission is increased. The measurement results show that the modulating rate up to 4G bps at 0.18um CMOS process. In addition, the design of a 60-GHz transmitter takes into consideration of the problem in a traditional OOK design, where the full signal swing can lead to VDD disturbance, affecting the operation of other circuits. A different circuit topology is proposed here to achieve the OOK modulation, which can reduce the impact during the on/off state change and improve the circuit stability. Measurement results show that the modulation is correct as the data rate increases up to 3.5G bps. The circuit core area is 0.18mm2 and the energy consumption is 8.3pJ/bit.