Abstract
Conventional testing scheme for a chip utilizes probes or sockets between Automatic Test Equipment (ATE) and Device Under Test (DUT), which will cost a lot and damage I/O pads in wafer easily. To improve the quality of chip testing, some advanced testing technologies are discussed, such as wireless testing methodology. A wireless testing concept is proposed in HOY : an emerging test platform. By embedding a wireless communication module into DUT chip, the testing instructions and testing data can be transmitted through wireless channel. In this thesis, a baseband processor used for wireless communication interface is presented. The proposed baseband processor provides several functions, including controlling RF to build up the wireless channel at initial and controlling transmission power gain during data communication. Channel encoding and decoding also improve the communication robustness. With the coding, BER can be less than 10^-6 for the RF distance of about 1 cm. Moreover, baseband processor deals with some sampling frequency offset problems and synchronization at the initial of receiving data. The baseband processor has been integrated with some other digital parts and RF module. The whole system is implemented by using FPGA board and discrete component RF module. There are also some prototypes for HOY demonstration. The latest version in HOY project is the integration of the whole communication module with HOY system. The integration includes digital circuits and analog RF module. The integration has been verified and taped-out in March, 2008. By using memory as DUT core, the overhead of HOY communication module is about 3.64% with the core area 17.3 mm2. The overhead of baseband processor is about 0.75%.