Abstract
In this study, the readout circuit is designed for novel digital X-ray detector sensors, for the purpose of integrating with active matrix flat panel imagers, 2400 x 2400 pixel array and 50μm pixel size, into digital X-ray systems which frame rate is 2 frame/s, for radiography or mammography medical image applications. This thesis is composed of two parts. The first part is conventional readout circuit architecture, using a charge amplifier to readout the pixel charge, and eliminate the offset voltage through a correlated double sampling (CDS) circuit to reduce fixed-pattern noise (FPN). The signal readout speed of the readout circuit is 10kHz, and the chip consists of a charge amplifier, a CDS circuit, and a level shifter, fabricated in TSMC 0.35μm 2P4M CMOS process and occupied 4.1mm2 area. The offset voltage in the amplifier of the CDS circuit is measured, which will cause column-to-column FPN (C-C FPN) in the column-level readout circuit. In second part, a digital CDS technique is proposed to realize an analog-to-digital converter. The digital CDS circuit consist of a charge amplifier, a current-steering D/A converter (DAC), a comparator, a synchronous counter, and digital control logics. We improve the charge amplifier architecture, and design the current-steering DAC and comparator. The DAC conversion rate is 10MHz to achieve 10-bit signal resolution, which INL and DNL are both less than 0.5LSB. The previous designed analog CDS is substituted by digital CDS, which does not exist the former FPN problem caused by the amplifier offset voltage, and also improve non-ideal effect, such as conversion error because of clock skew, capacitor mismatch and clock feedthrough, in the conventional column-level single-slope A/D converter.