Abstract
In recent years, the portable electronic device industry has been highly prosperous. The advance in wireless communication technology has dramatically improved people's lives. As the technologies progress constantly, analog-to-digital converter starts to play an important role in the era of digital. Analog-to-digital converter can convert nature signals into digital signals, then send the digital data to post-stage circuit. Thanks to the invention of the converts, technologies progress rapidly in these years. With the increase of the amount of data transmission and the growing demand of high-speed transmission, how to achieve high resolution and high sample rate analog-to-digital converter becomes one of the main issues. This thesis introduces algorithms with Redundancy, multi-channel time-interleaved and successive-approximation analog-to-digital converter. Eventually, we have completed a multi-channel time-interleaved successive-approximation analog-to-digital converter with redundancy. Its specifications is 10bits and sampling rate is 400MS/s. We used TSMC 65 nm CMOS process to do the simulation design. This design achieves signal to noise and distortion ratio of 62.46dB, equivalent to the effective number of bits 10.08. The average power consumption is 9.38mW.