Abstract
OCT(Optical Coherence Tomography) is a type of medical imaging products, and has the advantage of no effects of radiation and injection Developer, no side effects on the human body, and mainly used in the detection of surface. This system has two types: TD(Time Domain) and FD(Frequency Domain). In this thesis, FD OCT system architecture is applied to design the hardware circuit, and toward the goal of raise frame rate. The chip is dividing into signal processing part and image processing part, using the Resample Unit, Hamming Window, FFT and other signal processing units, which are Log Unit for image processing, Resample Unit aimed at correcting the shape of the image output, interpolation method to resample sector data became the rectangular shape, and two memories to achieve high throughput rate purposes. Hamming Window is responsible for that the adjacent line data becomes a cycle of mutual relations, reducing the final imaging line with the line between the discontinuity. The proposed FFT(Fast Fourier Transform) processor refers Oh and Lim's algorithm derivation and hardware design architecture and uses Radix-2^4 and Radix-2^3 as the basic units to disassemble DFT(Discrete Fourier Transform),and the high throughput rate Pipeline hardware architecture is selected with the use of CSD(Canonic Signed Digit) multipliers instead of the complex multiplier to effectively reduce the area. Log image processes operations to the natural logarithm of the bottom, and a Taylor expansion is applied for simplification. In order to save space, without affecting the SQNR to design circuits. The proposed FFT processor is synthesized by a TSMC 0.18-μm process under the Slow Model of 80 MHz operating frequency with gate count of, 505.92K logic gates and can reach the output rate of 80 M pixel /sec.