Abstract
Flash memory cells require high voltage for program and erase operations. These high voltages are generated by charge pump circuits with low supply voltage. Therefore charge pumping circuit is one of the most important peripheral elements in flash memory. In recent years, portable electronic products to meet the popular demand of embedded flash become the key interest of researches and memory design house. Using standard low-voltage logic IC process, no high voltage devices are available. This creates a problem for the conventional charge pumping circuit, which allows high voltage across transistor terminals. This thesis provides one new charge pump circuit to solve this issue. It uses serial connected capacitors to control voltage difference between device terminals to less than 2Vdd. The new circuit fabricated in single well process can provide the high voltage for Flash memory operation and does not suffer from junction or gate oxide breakdowns. In order to avoid body effect, PMOS devices are adapted, which allows body, drain and gate to be tired together to overcome body effect. Higher output voltage and higher efficiency of the new circuit configuration are demonstrated. Optimization of the channel width, stage and output voltage for various Flash cell operation are presented.