Abstract
Semiconductor industry is an industry that requires both capital and technology, it faces not only pressure from high cost and timing for entering markets, but also has a major issue regarding to its yield. As for the production line, wafer bin map provides an essential clue for identifying any abnormality in wafers. It builds up a system which points out the causes that might be accounted for having such low yield. Nowadays, the majority method for recognizing wafer bin map in the fab is done through naked human eyes. However, the distribution of wafer bin map, as well as the engineer’s personal experiences or subjective estimations, could create problems of overtime-identifying and lack of accuracy which lead to results of low efficiency when it comes to problem solving. In order to discuss the correlation between the wafer bin map and defect map, this research conducts a methodology by using Fuzzy ART algorithm. During the analyzed model, firstly, this research recognizes number of wafer bin maps and defect maps. While speculating the wafer bin map, this model allows the engineers to find out not only which the manufacturing process is mistaken but also the particular die that appears to be abnormal. Since the engineers are able to trace back the mistake where it’s being made, they can of course improve the procedure by correcting the error. The sample size of wafers to this research is 75, and each of them contains 141 dies. While 55 wafer maps are used for training, the other 20 are for testing. The analytical result shows that there is 90% of accuracy. The system is able to successfully differentiate the random malfunction, also it provides supportive information for improving the efficiency while analyzing.