Abstract
Semiconductor industry has played a prominent role in Taiwan manufacturing industry. In the semiconductor research and design stage, the semiconductor engineers would use test vehicle to retain the wafer acceptance test data(WAT) from the wafer, then the semiconductor engineers could find a best die by checking the WAT data. But there are some problems to find the best die by traditional ways, the first problem is that the amount of WAT data is quiet big, the second problem is that there are hundreds of dies in a batch of wafer. It’s really a big test for semiconductor engineers to find the best dies (golden dies) from such a large WAT data. Accordingly, this research aims to build a system model to analyze the WAT data at R&D stage basing on the golden dies which semiconductor engineers defined earlier to help semiconductor engineers find the golden dies. At first step, this research use factor analysis to reduce the WAT data amount. The second step, this research use Adaptive Resonance Theory Network II (ART-2) to cluster the wafer dies. Real WAT data during semiconductor fortification are collected from a semiconductor manufacturing company and were experimented through the presented analysis model. Therefore, the proposed methodology in this research can help the semiconductor engineer find the golden dies more quickly and efficiently, and the analysis time can be reduced during semiconductor fortification.