Abstract
Gate stack engineering is a big issue of Ge MOSFETs to realizing high performance. The consideration of EOT scaling and mobility degradation should be taken during the fabrication of gate stack. Two ways are generally proposed to enhance the drive current of a MOSFET, namely, a smaller equivalent oxide thickness (EOT) and a higher carrier mobility. The EOT can be scaled down by high dielectric constant (k value) gate oxide materials, thus the MOS capacitance is increased. However, the interface state density and defect may be induced by the lattice mismatch of Ge and high-k. Besides, the carrier mobility would be decreased by the higher scattering effects, which eventually lead to the degradation of device drive current. A gate stack with Al2O3 buffer layer(BL) is proposed to passivate GeO2 IL in the first part of this thesis. Al2O3 is a material with excellent thermal stability. The diffusion of GeOx can be suppressed by Al2O3 BL. By comparing electrical characteristics of MOSFETs with Al2O3 BL and Al-rich capping layer, some effect was clarified. The MOS capacitor with Al2O3 BL maintains better hysteresis, lower interface trap density and the MOSFETs with Al2O3 BL achieved higher hole mobility. A record high mobility of 655 cm2/Vs was achieved with GeOx/Al2O3 /HfON /TiN gate stack. The interface was passivated by the Al2O3 BL. Effects on EOT and gate leakage of oxygen vacancy at different depth of high-k gate dielectric are studied in the second part. Oxygen vacancy was introduced into high-k material by Zr-rich capping layer. Combining the passivation of Al2O3 BL, the MOSFET with vacancy close to Ge achieved excellent transfer characteristics and mobility. The EOT is aggressively scaled by bulk vacancy and vacancy near to gate electrode, but the leakage is also too high. An EOT of ~6.4 Å, gate leakage current density of ~10-5μA/cm2, ON/OFF ratio=3.5 orders, S.S. of 130mV/dec, mobility of 618 cm2/Vs in Ge pMOSFET is achieved by GeOx/Al2O3 /Zr-rich/ZrO2 /TiN gate stack. The frequency dispersion is eased and gate leakage is suppressed by various gate electrode materials in the third part. Atomic layer deposited TiN, HfN and ZrN was applied to decrease the border trap and reduce the leakage. The gate leakage was suppressed down by ALD HfN and ZrN for 4 orders. The dispersion was eventually become slight. At the same time, an excellent performance of ~120 mV/dec S.S. and ~10 μA/μm drive current is obtained.