Abstract
In recent years, the reduction of power consumption by the microprocessorand DSP has become an important design constraint. Loop buffer techniques were proposed to reduce power consumption.These approaches are based on two main observations.The first observation is that a significant fraction of power consumedis by memory access and instructions decode.The second observation is that a major fraction of dynamic instructioncounts of many applications are from small tight loops.Although schemes of papers are very effectivein reducing power, they work for the inner-most loop only.In this paper, we propose a stack-based controllerwhich is called Loop Cache Controller (LCC).Our scheme can deal with nested-loop of all styles and if-then-elseconstruct in a loop . At last,we use power estimator Wattch to estimate the powerreduction at the instruction level. Our experiments show the reductions ofpower consumption of our technique is up to 60 \% as compared topower consumption of that without instruction buffering techniqueat fetch and decode stages.