Abstract
We present in this project two new algorithms for the synthesis of low power VLSI circuits. One is for binding variables to registers and partitioning the registers into groups so that a group of registers can be shut down when all the registers in the group are inactive during some of the clock cycles. The other is for binding operations to functional units to reduce the circuit activities of the units. By holding the selection lines of the multiplexors which are connected to a functional unit unchanged until the functional unit is ready to execute a new operation, we can reduce substantially the circuit activities of the functional units. We integrated the two algorithms in a synthesis. Our experimental results show that (i) Our register binding and partitioning algorithm reduces 40-65% of the total number of active steps in all registers when compared with the left edge algorithm. (ii) Our functional unit binding algorithm improve both area (substantial) in terms of the number of functional units and power consumption (small,~3%) when compared with the integrated allocation algorithm.