Abstract
In this thesis, we present a soft-macro placement method for high performance layout designs by given timing and connectivity information. The objective of our soft-macro placement is to minimize the wire length of the most critical path. Experimental results demonstrate that our soft-macro placer can produce a soft-macro placement free from overlap and then the wire length of the most critical path of the final layout on an average of 6.22%-24.93% shorter than that generated using a flatten design method by EDA tools.