Abstract
This work proposes a MOSFET gate voltage adjustment mechanism with a real capacitance in 4T active pixel sensor structure to increase the dynamic range of CMOS image sensor. This 4T APS structure also combines with correlation double sampling (CDS) circuit in order to reduce fixed pattern noise. This chip utilizing a 16:10 monitor size to replace traditional 4:3 sensor array is designed by using a TSMC 0.35μm 2P4M CMOS technology therefore there will be an advantage that we don’t need to use complex base transformation between sensor and monitor. For sensor structure, (1)We use P+/Nwell/Psub material in CMOS 0.35um process to implement photo-detector. (2)An active pixel sensor is realized with 4T structure and an integration capacitor to extend dynamic range. (3) Including correlation double sampling circuit to get the signal which is more accurate and without noise. (4)Constant Gm bias is obtained to provide a power independent current. Finally, we use FPGA to implement timing control and a stable light source to illuminate sensor area to accomplish the experimental environment. Then results are measurement from digital meter or oscilloscope. From quantizing the measurement results, the dynamic range is extended as what we expect.