Abstract
In this thesis, there is a wideband class-AB power amplifier (PA) had been designed, simulated, analyzed, and taped out with TSMC 65nm CMOS technology. The thesis is organized into five chapters. The first two chapters are the applications, related parameters, and design theories of the PA. The other chapters are about the design flow, circuit simulation and results analysis. The complete circuit is a radio-frequency transmitter, which includes an input buffer stage, a power stage, and a balance to unbalance transformer to connect with the output port. The wideband class-AB PA is applied to the impulse radio-frequency transmitter. There will be two opposite phase clock signal through the switchable clock buffer to the PA, and the frequency of the clock signal will be the operation frequency of the PA. After the signal through the buffer, it will become a 1ns impulse with 100ns period, and then the PA will increase the power of the output signal for antenna measurements. The power supply of the transmitter is 1.0V, and the power consumption is about 33mW when turn on. The main operation frequency of the PA is 7.5GHz with 9dBm saturation power, 13dBm IIP3, and 25％ PAE. The operational bandwidth of the circuit is 3.2GHz to 8.6GHz. The definition of the bandwidth in this design is 3dB decrease of S21 and S22 should be smaller than -6dB to avoid the formation of standing wave on the PCB.