Abstract
This thesis introduces a new technique for establishing an up-conversion sub-harmonic mixer. The choice of the sub-harmonic mixer takes advantage of only half RF frequency needed at the LO port. This characteristic eliminate the LO feed through problem because the frequency of LO is usually close to RF frequency for conventional up-conversion mixer in homodyne system. For this sub-harmonic mixer design, an octet phase generator is needed, which is realized by two poly-phase filters. To verify the designed mixer, an experimental chip is fabricated by 0.18μm mixed-mode CMOS technology. According to the measurement results, the mixer gain is -8.05 dB, IIP3 is 7.56 dBm, power consumption is 24.3 mW and the chip area is 1.2mm× 1.7mm. Another problem for this mixer is the phase mismatch. This thesis introduces a phase error detection technique to know how much the phase error is. There are three phase error sources: differential duration error, I/Q phase error, and total LO octet phase error. By adding CMOS switches to the mixer, the first two error sources can be detected.