Logo image
可撓式電容脈搏感測器陣列與CMOS感測電路之設計與製作
Thesis

可撓式電容脈搏感測器陣列與CMOS感測電路之設計與製作

彭任佑
Masters, 國立清華大學, 電子工程研究所
2012

Abstract

脈搏 CMOS 軟性 CDS 時序 pulse CMOS flexible CDS timing
This paper reports the development of a capacitive pulse sensor array using flexible printed circuit board and its CMOS readout circuit. The circuit design allows fast sampling to achieve simultaneous recording of pulse pressure. The readout circuit chip is fabricated by using the TSMC 0.35-um 2P4M CMOS process. The 5×5 capacitive sensor array is placed within an area of 10 mm × 7.5 mm and fabricated by assembling two flexible printed circuit boards. Each board has two copper layers on top and bottom. The two chips are electrically connected by wire bond. Capacitance change is produced due to the change in the displacement of the sensing structure. Each sensing pixel is selected by clocks and the signal is processed through correlated double sampling and sample-and-hold. Clock signals are produced by the NI (National Instruments) PCIE timing control system. The measured result shows the noise of circuit is 104dbv/√ Hz, the sensitivity is 1.4153 mV/mm-Hg, and the pulse frequency is 1.5Hz. The measured pulse pressure is 93.13 mm-Hg.

Metrics

1 Record Views

Details

Logo image